1. Field of the Invention
This invention relates to a CMOS-input-type IC using, at least in its input end, a CMOS circuit, and also to a power source switching circuit for the IC.
2. Description of the Related Art
As great advances have recently been made in semiconductor technology, the application of CMOS-input-type ICs to various fields is on the rise. Particularly in custom ICs, the CMOS-input-type IC has been the pivotal.
Generally, custom ICs manufactured by CMOS process consume only a very small quantity of electrical power during operation. So CMOS-type custom ICs have been widely used in controlling SRAMs when the quantity of power is limited. As a common practice, this kind of circuit is equipped with a backup power source in order to maintain data in an SRAM when main power source voltage drops; at that time, the power source for the custom IC and the SRAM is switched from the main power source to the backup power source.
However, with this conventional CMOS-type custom IC, when shifting the main power source to the backup power source, a relatively large rush current lasting tens of msec would flow in an input buffer to cause a voltage drop of in the backup power source. Therefore, the data in the SRAM would be destroyed even if a backup power source is used.
This type of circuit is popularly used in cartridges for TV games. In a case, where data in the SRAM of a game cartridge is destroyed during the time when a player is playing a game, the player must restart the game from the beginning.
FIG. 4 of the accompanying drawings shows a typical conventional CMOS-type custom IC to be used as a control for SRAM. This custom IC 10 has a power supply terminal 12 and a plurality of input terminals 14-1, 14-2, . . . 14-n. The power supply terminal 12 is connected to a main power source having a large capacity. Signals S1, S2, . . . Sn inputted from the respective input terminals 14-1, 14-2, . . . 14-n are inputted, via inverter circuits 16-1, 16-2, . . . 16-n being used as input buffers, to an internal arithmetic and control circuit 70 where various kinds of operational and control actions are performed to control a non-illustrated SRAM.
As shown in FIG. 5A, when the main power source is turned off, the power supply terminal 12 is then connected with the backup power source so that the custom IC 10 and the non-illustrated SRAM are operable so as to hold the data stored in the SRAM.
In the individual input buffer (i.e., inverter circuit 16 in FIG. 4), the source of a p-channel MOSFET is connected to a supply line while the source of an n-channel MOSFET is connected to a ground line and the drain of the p-channel MOSFET is connected to the drain of the n-channel MOSFET.
In the operation of the p-channel and n-channel MOSFETs, there exists a transitional area where both MOSFETs can assume an ON state temporarily when the individual MOSFETs shift from the ON state to the OFF state as the gate voltage varies. In this transitional area, both the supply line and the ground line become conductive to allow a rush current to flow.
Generally, since the gate voltage is shifted substantially instantaneously, the time during which this rush current flows is very short, and hence the accumulated rush current is negligible.
With the main power source turned off, the input voltage becomes non-stable so that the gate voltage stays in the transitional area for a long period of time.
FIG. 6 shows an inverter circuit 16 which is the simplest form of a CMOS circuit used as an input buffer. In FIG. 6, TrA and TrB stand for a p-channel MOSFET and an n-channel MOSFET, respectively. If its input IN (gate voltage) to inverter circuit 16 is high, TrB is turned on and TrA is turned off so that output OUT (drain) of inverter circuit 16 will be conductive with the ground line (low). On the contrary, if input IN is low, TrA is turned on while TrB is turned off so that output OUT will be conductive with the supply line (high). Because the threshold of TrA is usually higher than that of TrB, there exists a transitional area where the ON states of both TrA and TrB overlap. In this transitional area, the supply line and the ground line become conductive to allow a rush current to flow.
As discussed above, since the gate voltage of each of TrA and TrB are shifted instantaneously, the accumulated rush current would be negligible. However, if the main power source is turned off, the input voltage becomes non-stable so that the gate voltage will stay in the transitional area over a long period of time.
FIGS. 7A, 7B and 7C shows how the transitional area (where a rush current may flow) of inverter circuit 16 changes and how the voltage input of signals to input terminals 14-1, 14-2, . . . 14-n relate to the transistional area, when the power source of a CMOS-input-type IC is switched from the main power source of 5 V to the backup power source of 3 V.
The voltage of the input signal to input terminals 14-1, 14-2, . . . 14-n of the CMOS-input-type IC varies at a rate different from the changing rate of the transitional area, depending on the characteristic of the circuit.
Since the backup power source will not be connected to the circuit forwardly of the CMOS-input-type IC in particular, the input signal voltage may oscillate, depending on the state, as the main power source is cut off. Consequently it is difficult to foresee how the signal voltage will change.
FIG. 7A shows the change when the input signal voltage input terminal 14-1, 14-2, . . . 14-n is lowered progressively from the high level; FIG. 7B shows the change when the signal voltage oscillates from the low level; and FIG. 7C shows the change when the signal voltage oscillates from the high level.
In FIG. 7A, the input signal voltage crosses the transitional area over a long period of time, while in FIG. 7B and 7C, it repeatedly enters the transitional area, thus staying in the transitional area.
As the input signal thus stays in the transitional area over a long period of time, a rush current flows from the supply line to the ground line in the CMOS-input-type IC for a long period of time so that a possible backup power source of a small capacity is unable to bear this consumption of electric power, lowering the voltage sharply.
In the foregoing description, the input circuit is an inverter circuit; although it may be an alternative type of circuit with similar results. This is because the supply line of the CMOS-input-type IC is connected to the ground line via the source and drain of the p-channel MOSFET and the drain and source of the n-channel MOSFET and consequently, a rush current flows for a long time to sharply lower the voltage of the backup power source.
Since the voltage lowering time is 50-100 msec, which is very long as compared to the operating time 100-200 ns of SRAM, the data held in the SRAM will be destroyed during that time.
For this reason, in the conventional game cartridge, it has been a common practice to cut off the custom IC, which controls an SRAM, from the backup power source. After shifting from the main power source to the backup power source, the conventional game cartridge also takes the trouble of controlling the SRAM into a standby mode, in which the SRAM only holds data, by using a standby-mode-dedicated circuit in the form of a discrete circuit independent of the custom IC. With this conventional method, however, the number of components of the entire circuit would increase, which results in an increased cost of production.